Antonios Nikitakis

Electrical and Computer Engineer of Hellenic Technical Chamber

Contact Information	Address: Chania, Crete, GREECE Mobile: (+30) 6973 858430 Office: (+30) 2821 0 37207 E-mail: a.s.nikitakis<at>gmail.com, anikitakis<at>sc.tuc.gr, anikita<at>mhl.tuc.gr Linkedin: http://gr.linkedin.com/pub/antonis-nikitakis/20/441/625/
Personal Information	Date of Birth: April 11^th, 1980 Nationality: Hellenic Birth Location: Chania, Crete, Greece
Education (in progress) Education	University of Crete, Greece, Faculty of Social Sciences, Department of Psychology 2012 – present Technical University of Crete, Greece,  November 2013 Ph.D Degree in Electronic and Computer Engineering  Area of Specialization: SoC Design in Computer Vision Applications Thesis: High Performance Low Power Embedded Vision Systems Technical University of Crete, Greece, June 2008. MSc. Degree in Electronic and Computer Engineering  Area of Specialization: Computer Architecture and Hardware Design. Thesis: Accelerating Network Classification using FPGAs Democritus University of Thrace, Greece, March 2004. Di.Eng. (5-year diploma) Electrical and Computing Engineering, GPA: 7.6 (out of 10). Area of Specialization: Hardware design and Cryptography  Thesis: A crypto core implementation using FPGAs
Professional Experience	2014-present Technical University of Crete, Microprocessor & Hardware Lab (http://www.mhl.gr/) Research Assistant -Hardware Engineer: Ø (AFORMI) EU Project 2010-2013 Telecommunication Systems Institute,Chania,Crete,Greece (www.tsi.gr) Research Assistant -Hardware Engineer: Ø (R3-COP) EU Project Ø (RUNNER) EU Project 2008-2010 Telecommunication Systems Institute,Chania,Crete,Greece (www.tsi.gr) Research Assistant-Hardware Engineer: Ø (OSMOSIS) EU Project (September 2008 – 2010) 2005-2006, Telecommunication Systems Institute,Chania,Crete,Greece (www.tsi.gr) Research Assistant -Hardware Engineer: Ø (ERMIS )EU Project: Design of a complex IC for the support of service bundles in embedded networking systems) (January 2005 - December 2006) 2004-present ,Technical University of Crete Lab assistant at the Microprocessor and Hardware Laboratory (www.mhl.tuc.gr) 2004-2006, Go-online Programme (www.go-online.gr), Chania,Crete,Greece Support Counselor

Teaching  Experience

2004-present ,Lab assistant in the following undergraduate University courses: Ø Computer Organization, (VHDL implementation of a pipelined MIPS architecture) Ø Computer Architcture, (VHDL implementation of an out-of-order CPU architecture ) Ø Digital Computers (an introduction to assembly language in Mips architecture) Ø VLSI Systems Design (an introduction to VLSI CAD design)

Publications and technical reports	Ø Nikitakis A., Paganos T., Papaefstathiou I. "A novel Embedded System for Vision Tracking ", Accepted to appear in  IEEE International Conference on  Design, Automation & Test in Europe Conference & Exhibition (DATE’ 2014) (acceptance rate 35%), March 2014. [pdf] Ø Nikitakis A. , Papaioannou S. and Papaefstathiou  I. . 2013. "A novel low-power embedded object recognition system working at multi-frames per second", ACM Trans. Embed. Comput. Syst. 12, 1s, Article 33 (March 2013), 20 pages. –best paper award in ESTIMedia ‘12 Symposium., March 2013. [pdf] Ø Bouris, D., Nikitakis A., and Papaefstathiou I., "Fast and Efficient FPGA-Based Feature Detection Employing the SURF Algorithm" Field-Programmable Custom Computing Machines (FCCM), 2010 18th IEEE Annual International Symposium on , vol., no., pp.3,10, 2-4 May 2010 (acceptance rate 18%), May 2010 Ø Master Thesis: “Design and Implementation of a 5d Classification Engine”, Technical University of Crete, May 2008 Ø Antonis Nikitakis, Ioannis Papaefstathiou:  “A memory-efficient FPGA-based classification engine”, IEEE FCCM, April 2008. (acceptance rate 20%) Ø Antonis Nikitakis, Ioannis Papaefstathiou:  “A Multi Gigabit FPGA-based 5-tuple classification system”, IEEE ICC, 2008. (acceptance rate 36%) Ø Article in the Greek Science magazine “Periskopio tis Epistimis”: “Asynchronous Processors, a modern challenge”, June 2004. Ø Article in the Greek Science magazine “Periskopio tis Epistimis”: “Hyper computers the giants of computing”, April 2004. Ø Diploma Thesis: “Implementation of a high speed crypto core using FPGAs”, Democritus University of Thrace, February 2004.
Technical Skills	Ø Programming Laguages : C (fluent), C++(fluent), Assembly MIPS, Fortran Ø Hardware Description Languages: VHDL, High Level Synthesis (HLS) Ø Hardware Tools : Xilinx Vivado, Xilinx ISE, Xilinx EDK/SDK, Xilinx Vivado, Modelsim, Altera MaxPlus, AVR Studio, SPIM, Electronic Workbench Ø Programming Tools & Libraries: Matlab, OpenCV library, OpenMP, CUDA Ø Desktop Tools : Microsoft Office, Open Office Ø Operating Systems : Microsoft Windows, Unix(Linux) , MacOS
Conference and seminar attendance	2009, June IEEE Computer Society and the Technical Committee on Computer Architecture The 16^th International Workshop on Systems, Signals and Image Processing (IWSSIP) 2007, November Technical University of Crete,  General Secretariat for Research and Technology (Greek Ministry of Education) Seminar: “Security in Networks and Computer Systems” 2006, June IEEE Computer Society Technical Committee on Simulation and the IEEE Computer Society Technical Committee on Design Automation 17^ο Annual International IEEE Symposium: “Rapid System Protoyping, Shortening the Path from Specification to Prototype”
Journal/Conference Reviewer	ACM Journal of Applied and Computational Mathematics, 2013 IEEE International Conference on Field Programmable Logic and Applications (FPL), 2010, 2012

Research Interests	Hardware Design, FPGAs, Embedded SoC design, Computer Vision, Computer Networks, Cryptography
Additional Information	Foreign Languages: Ø First Certificate in English, December 1995 Ø Zertifikat, Deutsch als Fremdsprache, August 1996