Kyprianos D. Papadimitriou (Papademetriou)

updated: July 25, 2016
Scientific staff
Technical University of Crete (TU Crete)
School of Electrical and Computer Engineering (ECE)
Microprocessor and Hardware Laboratory (MHL)

Kounoupidiana Campus
Chania, Crete, GR 73100, Greece
email: kpapadim at mhl.tuc.gr
url: users.isc.tuc.gr/~kpapadimitriou
Tel: +30 2821037219 (office)   +30 6983523312 (mobile)
Office: Sciences' buidling, Room: 137.B.69 (ground floor)
 
 

News
Research Interests
Education
Selected Publications
Research and Industry Experience
Publications

Publications that appear in IEEE Conferences or Journals are subject to the ©IEEE Copyright policies. Publications that appear in ACM Conferences or Journals are subject to the ©ACM Copyright policies. IEEE and ACM own the copyright to all material published by the IEEE and ACM respectively. Personal use of this material is permitted.

    Journals

  1. D. Pnevmatikatos, K. Papadimitriou, T. Becker, P. Bohm, A. Brokalakis, K. Bruneel, C. Ciobanu
    T. Davidson, G. Gaydadjiev, K. Heyse, W. Luk, X. Niu, I. Papaefstathiou, D. Pau, O. Pell, C. Pilato,
    M. D. Santambrogio, D. Sciuto, D. Stroobandt, T. Todman , E. Vansteenkiste
    FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration
    ELSEVIER Journal on Microprocessors and Microsystems (MICPRO), 39(4-5), pp. 321-338, 2015.

  2. M. D. Grammatikakis, K. Papadimitriou, P. Petrakis, A. Papagrigoriou, G. Kornaros, I. Christoforakis
    O. Tomoutzoglou, G. Tsamis, M. Coppola
    Security in MPSoCs: A NoC Firewall and an Evaluation Framework
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), special issue on Hardware Security and Trust, 34(8), pp. 1344-1357, Aug, 2015. also in gem5

  3. K. Papadimitriou, A. Dollas, S. Hauck
    Performance of Partial Reconfiguration in FPGA Systems: A Survey and a Cost Model
    ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 4, no. 4, December 2011.

  4. K. Papadimitriou, A. Anyfantis, A. Dollas
    An Effective Framework to Evaluate Dynamic Partial Reconfiguration in FPGA Systems
    IEEE Transactions on Instrumentation and Measurement (TIM), vol. 59, no. 6, pp. 1642-1651, June 2010.

  5. K. Papadimitriou, A. Dollas, S. Sotiropoulos
    Low Cost Real-Time 2-D Motion Detection based on Reconfigurable Computing
    IEEE Transactions on Instrumentation and Measurement (TIM), vol. 55, no. 6, pp. 2234-2243, December 2006.

  6. A. Dollas, S. Sotiropoulos, K. Papademetriou
    A 2D Motion Detection Model for Low Cost Embedded Reconfigurable I/O Devices
    IEEE Transactions on Biomedical Engineering (TBME), vol. 52, no. 8, pp. 1443-1449, August 2005.

  7. Book Chapters

  8. K. Papadimitriou, S. Thomas, A. Dollas
    An FPGA-based Real-time System for 3D Stereo Matching, Combining Absolute Differences and Census with Aggregation and Belief Propagation
    Springer Book; peer-reviewed selected papers from the 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp. 168-187, 2013.

  9. Conferences

  10. P. Petrakis, M. Abuteir, M. D. Grammatikakis, K. Papadimitriou, R. Obermaisser, Z. Owda, A. Papagrigoriou, M. Soulie, M. Coppola
    On-Chip Networks for Mixed-Criticality Systems
    IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), London, UK, July 2016.

  11. M. D. Grammatikakis, K. Papadimitriou, P. Petrakis, M. Coppola, M. Soulie
    Address Interleaving for Low-cost NoCs
    International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Tallinn, Estonia, June 2016.

  12. G. Tsamis, S. Kavvadias, A. Papagrigoriou, M. D. Grammatikakis, K. Papadimitriou
    Efficient Bandwidth Regulation at a Memory Controller for Mixed-Criticality Applications
    International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Tallinn, Estonia, June 2016.

  13. K. Papadimitriou, P. Petrakis, M. Grammatikakis, M. Coppola
    Security Enhancements for Building Saturation-free, Low-power NoC-based MPSoCs
    IEEE International Workshop on Security and Privacy in Cybermatics (SPiCy), in conjunction with the IEEE International Conference on Communications and Network Security (CNS), Florence, Italy, Sep 2015. also in gem5

  14. G. Charitopoulos, D. Pnevmatikatos, M. SantambrogioK. Papadimitriou, D. Pnevmatikatos
    A Run-Time System for Partially Reconfigurable FPGAs: The case of STMicroelectronics SPEAr board
    ParaFPGA: Parallel Computing with FPGAs, in conjunction with the International Conference on Parallel Computing (ParCo), Edinburgh, UK, Sep 2015.

  15. G. Charitopoulos, I. Koidis, K. Papadimitriou, D. Pnevmatikatos
    Hardware Task Scheduling for Partially Reconfigurable FPGAs (extended version of HiPEAC WRC'15 paper)
    International Symposium on Applied Reconfigurable Computing (ARC), Bochum, Germany, April 2015.

  16. G. Charitopoulos, I. Koidis, K. Papadimitriou, D. Pnevmatikatos
    Hardware Task Scheduling for Partially Reconfigurable FPGAs
    HiPEAC Workshop on Reconfigurable Computing (WRC), Amsterdam, Netherlands, January 2015.

  17. M. D. Grammatikakis, K. Papadimitriou, P. Petrakis, A. Papagrigoriou, G. Kornaros, I. Christoforakis, M. Coppola
    Security Effectiveness and a Hardware Firewall for MPSoCs
    6th IEEE International Workshop on Multicore and Multithreaded Architectures and Algorithms (M2A2), in conjunction with the 16th IEEE International Conference on High Performance Computing and Communications (HPCC), Paris, France, August 2014. also in gem5

  18. D. N. Pnevmatikatos, T. Becker, A. Brokalakis, G. N. Gaydadjiev, W. Luk, K. Papadimitriou,
    I. Papaefstathiou, D. Pau, O. Pell, C. Pilato, M. D. Santambrogio, D. Sciuto, D. Stroobandt
    Effective Reconfigurable Design: The FASTER Approach
    International Symposium on Applied Reconfigurable Computing (ARC), Vilamoura, Portugal, April 2014.

  19. C. Vatsolakis, K. Papadimitriou, D. Pnevmatikatos
    Enabling Dynamically Reconfigurable Technologies in Mid Range Computers Through PCI Express
    HiPEAC Workshop on Reconfigurable Computing (WRC), Vienna, Austria, January 2014.

  20. G. Rematska, K. Papadimitriou, A. Dollas
    A Low-Cost Embedded Real-Time 3D Stereo Matching System for Surveillance Applications
    IEEE International Symposium on Monitoring and Surveillance Research (ISMSR), in conjunction with the IEEE International Conference on Bioinformatics and Bioengineering (BIBE), Chania, Greece, November 2013.

  21. S. Thomas, K. Papadimitriou, A. Dollas
    Architecture and Implementation of Real-Time 3D Stereo Vision on a Xilinx FPGA
    IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Istanbul, Turkey, October 2013. Nominated for best paper award.

  22. C. B. Ciobanu, K. D. Papadimitriou, D. N. Pnevmatikatos, G. N. Gaydadjiev
    FASTER Run-Time Reconfiguration Management
    ACM 27th International Conference on Supercomputing (ICS), Oregon, US, June 2013.

  23. M. D. Santambrogio, C. Pilato, D. Pnevmatikatos, K. Papadimitriou, D. Stroobandt, D. Sciuto
    The FASTER Vision for Designing Dynamically Reconfigurable Systems (invited)
    IEEE International Conference on IC Design and Technology (ICICDT), Pavia, Italy, May 2013.

  24. K. Papadimitriou, C. Pilato, D. Pnevmatikatos, M. D. Santambrogio, C. Ciobanu, T. Todman,
    T. Becker, X. Niu, T. Davidson, G. Gaydadjiev, W. Luk, D. Stroobandt
    Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration
    IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC), Paphos, Cyprus, December 2012.

  25. K. Papadimitriou, D. Pnevmatikatos, A. Dollas, C. Koulamas, S. Aggelidakis, P. Chatzidakis, L. Vasilikiotis, M. Emmanouilidou
    Developing RFID-based Systems for Security in Marine Transportations
    Panhellenic Conference on Informatics (PCI), Athens, GR, October 2012.

  26. D. Pnevmatikatos, T. Becker, A. Brokalakis, K. Bruneel, G. Gaydadjiev, W. Luk, K. Papadimitriou,
    I. Papaefstathiou, O. Pell, C. Pilato, M. Robart, M. D. Santambrogio, D. Sciuto, D. Stroobandt, T. Todman
    FASTER: Facilitating Analysis and Synthesis Technologes for Effective Reconfiguration
    Euromicro Conference on Digital System Design (DSD), Cesme, Izmir, Turkey, September 2012.

  27. K. Papadimitriou, C. Vatsolakis, D. Pnevmatikatos
    Acceleration of Computationally-Intensive Kernels in the Reconfigurable Era (invited)
    IEEE International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, UK, July 2012.

  28. M. D. Santambrogio, D. Pnevmatikatos, K. Papadimitriou, C. Pilato, G. Gaydadjiev, D. Stroobandt,
    T. Davidson, T. Becker, T. Todman, W. Luk, A. Bonetto, A. Cazzaniga, G. C. Durelli, D. Sciuto
    Smart Technologies for Effective Reconfiguration: The FASTER Approach
    IEEE International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, UK, July 2012.

  29. A. H. Gholamipour, K. Papadimitriou, F. Kurdahi, A. Dollas, A. Eltawil
    Area, Reconfiguration Delay and Reliability Trade-Offs in Designing Reliable Multi-Mode FIR Filters
    IEEE International Design and Test Workshop (IDT), in conjunction with the IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 82-87, Beirut, Lebanon, December 2011.

  30. A. Ilias, K. Papadimitriou, A. Dollas
    Combining Duplication, Partial Reconfiguration and Software for On-line Error Diagnosis and Recovery in SRAM-based FPGAs
    IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 73-76, Charlotte NC, USA, May 2010.

  31. C. Effraimidis, K. Papadimitriou, A. Dollas, I. Papaefstathiou
    A Self-Reconfiguring Architecture Supporting Multiple Objective Functions in Genetic Algorithms
    IEEE International Conference on Field Programmable Logic and Aplications (FPL), pp. 453-456, Prague, Czech Republic, August 2009.

  32. M. Vavouras, K. Papadimitriou, I. Papaefstathiou
    High-speed FPGA-based Implementations of a Genetic Algorithm
    IEEE International Conference on Embedded Computer Systems, Architectures, Modeling and Simulation (SAMOS), pp. 9-16, Samos, Greece, July 2009.

  33. M. Vavouras, K. Papadimitriou, I. Papaefstathiou
    Implementation of a Genetic Algorithm on a Virtex-II Pro FPGA
    ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), p. 287, Monterey CA, USA, February 2009.

  34. K. Papadimitriou, A. Anyfantis, A. Dollas
    Methodology and Experimental Setup for the Determination of System-level Dynamic Reconfiguration Overhead
    IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 335-336, Napa CA, USA, April 2007.

  35. K. Papadimitriou, A. Dollas
    Performance Evaluation of a Preloading Model in Dynamically Reconfigurable Processors
    IEEE International Conference on Field Programmable Logic and Aplications (FPL), pp. 901-904, Madrid, Spain, August 2006.

  36. K. Papademetriou, A. Dollas
    A Task Graph Approach for Efficient Exploitation of Reconfiguration in Dynamically Reconfigurable Systems
    IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 307-308, Napa CA, USA, April 2006.

  37. A. Dollas, K. Papademetriou, E. Sotiriades, D. Theodoropoulos, I. Koidis, G. Vernardos
    A Case Study on Rapid Prototyping of Hardware Systems: the Effect of CAD Tool Capabilities, Design Flows, and Design Styles
    IEEE International Workshop on Rapid Prototyping (RSP), pp. 180-186, Geneva, Switzerland, June 2004.

  38. K. Papademetriou, A. Dollas, S. Sotiropoulos
    A Real-Time Embedded I/O Device for Kinetically Challenged Persons
    XIV World Congress on Information Technology (WCIT), Athens, Greece, May 2004. Selected as outstanding work.

  39. S. Sotiropoulos, K. Papademetriou, A. Dollas
    Adaptation of a Low Cost Motion Recognition System for Custom Operation from Shrink-Wrapped Hardware
    ACM SIGMM Workshop on Biometrics Methods and Applications (WBMA), pp. 107-114, Berkeley Marina Radisson CA, USA, November 2003.

  40. A. Dollas, K. Papademetriou, S. Sotiropoulos, E.Sotiriades
    An Input Device to Assist Kinetically Challenged Persons Interfacing with the Environment (in Greek)
    Panhellenic Conference on Rehabilitation Medicine, pp. 82-83, Chania, Greece, October 2003.

  41. K. Papademetriou, A. Dollas, S. Sotiropoulos
    A Second Generation Embedded Reconfigurable Input Device for Kinetically Challenged Persons
    IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 294-295, Napa CA, USA, April 2003.

  42. A. Dollas, K. Papademetriou, N. Aslanides, T. Kean
    A Reconfigurable Embedded Input Device for Kinetically Challenged Persons
    International Conference on Field Programmable Logic and Applications (FPL), pp. 326-335, Belfast, N.Ireland, August 2001.

  43. A. Dollas, D. Pnevmatikatos, N. Aslanides, S. Kavvadias, E. Sotiriades, K. Papademetriou
    Rapid Prototyping of Reusable 4x4 Active ATM Switch Core with the PCI Pamette
    IEEE International Workshop on Rapid System Prototyping (RSP), pp. 17-23, Monterey CA, USA, June 2001.

  44. A. Dollas, D. Pnevmatikatos, N. Aslanides, S. Kavvadias, E. Sotiriades, S. Zogopoulos, K. Papademetriou, N. Chrysos, K. Harteros, E. Antonidakis, N. Petrakis
    Architecture and Applications of PLATO, a Reconfigurable Active Network Platform
    IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 101-110, Rohnert Park CA, USA, April 2001.

  45. Patents

  46. S. Sotiropoulos, A. Dollas, K. Papademetriou
    Digital Signal Processing Methods, Systems and Computer Program Products that Identify Threshold Positions and Values
    Filing date: May 20, 2005. Issue date: September 1, 2009. US Patent No. 7,583,819. Serial No. 11/133,861.

  47. Technical Reports

  48. A. Dollas, K. Papademetriou, C. Mathioudakis, E. Markatos, M. Katevenis
    Experimental ATM Network Interface Performance Evaluation
    Technical Report FORTH-ICS/TR-244, February 1999.

Teaching Experience
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People that Influenced me Heavily while I was doing my PhD Research
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